S.No Code Title Download
1 VLS2019(01) High-Performance Low-Power Carry Speculative Addition With Variable Latency
2 VLS2019(02) A Low-Cost Low-Power Ring Oscillator-based Truly Random Number Generator for Encryption on Smart Cards
3 VLS2019(03) A Fused Floating-Point Four-Term Dot Product Unit
4 VLS2019(04) An Improved DCM-based Tunable True Random Number Generator for Xilinx FPGA
5 VLS2019(05) Low-Power ECG-Based Processor for Predicting Ventricular Arrhythmia
6 VLS2019(06) An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2k, 2P - 1}
7 VLS2019(07) Design of High Speed Approximate Multiplier with Carry Speculation Compressor
8 VLS2019(08) Design-Efficient Approximate Multiplication Circuits Through Partial Product Perforation
9 VLS2019(09) Design and Implementation of Area-Efficient and Low-Power Configurable Booth-Multiplier
10 VLS2019(10) High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels
11 VLS2019(11) Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation
12 VLS2019(12) A Low-Voltage Radiation-Hardened 13T SRAM Bit cell for Ultralow Power Space Applications
13 VLS2019(13) Low-Power and Area-Efficient Shift Register Using Pulsed Latches
14 VLS2019(14) Fast and Wide Range Voltage Conversion in Multi supply Voltage Designs
15 VLS2019(15) Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications
16 VLS2016(16) High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator
17 VLS2019(17) Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology
18 VLS2019(18) Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit
19 VLS2019(19) A Fault Tolerance Technique for Combinational Circuits Based on Selective-Transistor Redundancy